1. Field of the Invention
This invention relates to an oscillation circuit having a transfer gate as a feedback resistor.
2. Description of the Related Art
Recently, most of portable type electronic devices are formed to contain semiconductor integrated circuit chips operated on a low power source voltage of 3V, for example. Such a low power source voltage is supplied from a lithium battery cell, for example, to the semiconductor integrated circuit chip. FIG. 1 shows the conventional crystal oscillation circuit which is designed to lengthen the service life of the battery. The crystal oscillation circuit includes power control unit PC, mode setting section MS and oscillator OS. Oscillator OS includes feedback reactance section FX and amplifier section FA. Feedback reactance section FX includes crystal resonator XT and capacitors C1 and C2, and amplifier section FA includes CMOS inverter IV and CMOS transfer gate TG respectively serving as an amplifier and a feedback resistor. Power control unit PC, mode setting section MS and feedback amplifier section FA are arranged in semiconductor integrated circuit chip SC, and feedback reactance section FX is arranged outside semiconductor integrated circuit chip SC. Power source voltage VB (3V) for semiconductor integrated circuit chip SC is supplied from battery BT.
Now, the operation of the crystal oscillation circuit is explained. When a reset signal is supplied to mode setting section MS, it sets the oscillation starting mode. In the oscillation starting mode, power control unit PC converts power source voltage VB to oscillation starting voltage VD. When oscillation starting voltage VD is supplied to oscillator OS, oscillator OS starts the oscillation operation so as to periodically generate pulses. Mode setting section MS counts the pulses sequentially generated from oscillator OS. When it is detected from the counted value that a preset time has elapsed after the starting of the oscillation operation and the oscillation operation becomes stable, then mode setting section MS changes the operation mode from the oscillation starting mode to the oscillation sustaining mode. In the oscillation sustaining mode, power control unit PC converts power source voltage VB to oscillation sustaining voltage VH which is smaller in absolute value than oscillation starting voltage VD. After this, oscillator OS is operated on oscillation sustaining voltage VH to sustain or continue the oscillation operation. In the crystal oscillation circuit, the power consumption is reduced after the oscillation operation becomes stable.
The driving ability of CMOS inverter IV and the resistance of CMOS transfer gate TG are dependent on the power source voltage of oscillator OS. In the oscillation starting mode, CMOS inverter IV is required to have larger driving ability than in the oscillation sustaining mode. If the driving ability of CMOS inverter IV is insufficient, oscillator OS cannot start the oscillation operation. As shown in FIG. 2, the resistance of CMOS transfer gate TG becomes smaller as the power source voltage of oscillator OS or oscillation starting voltage VD increases. When oscillation starting voltage VD is set too high, it becomes difficult to start the oscillation operation because of the excessive feedback of voltage.
Power control unit PC uses a voltage dividing circuit for converting power source voltage VB to oscillation starting voltage VD in the oscillation starting mode. When oscillator OS accidentally stops the oscillation operation, a reset signal is generated to set the oscillation starting mode again. In this case, power source voltage VB becomes lower than the initial voltage level because of the power consumption of the battery. Taking this into consideration, the voltage dividing ratio of the voltage dividing circuit K=VD/VB is set to a value closer to 1 so that the oscillation operation can be started without fail unless power source voltage VB is extremely reduced. FIG. 4 shows the relation between voltage dividing ratio K and the permissible variation range of power source voltage VB which is high enough to start the oscillation operation. When voltage dividing ratio K.apprxeq.0.5, the lower and upper limits of the permissible variation range are respectively set to levels VB2 (=2.2V) and VB2' (=4.0V), for example. When voltage dividing ratio K.apprxeq.1, the lower and upper limits of the permissible variation range are respectively set to levels VB1 (=1.1V) and VB1' (=2V), for example. Thus, in the crystal oscillation circuit, the permissible variation range of power source voltage VB is shifted when voltage dividing ratio K is changed.
The upper limit of the permissible variation range is set to a lower value as the voltage dividing ratio increases. In this case, the following defects will occur. At the time of shipment of the portable type electronic device, power source voltage VB of battery BT may probably be higher than 3V because the battery is not yet used. Therefore, when the upper limit of the permissible variation range is set to be lower than maximum power source voltage VB, oscillator OS will not start the oscillation operation.